The subject matter discussed in the background section should not be assumed to be prior art merely as a result of its mention in the background section. Similarly, a problem mentioned in the background section or associated with the subject matter of the background section should not be assumed to have been previously recognized in the prior art. The subject matter in the background section merely represents different approaches, which in and of themselves may also correspond to embodiments of the claimed subject matter.
A GPU or graphics processing unit provides special circuitry designed to rapidly manipulate and alter memory in such a way so as to accelerate the building of images in a frame buffer intended for output to a display. GPUs are used in embedded systems, mobile phones, personal computers, workstations, and game consoles and are very efficient at manipulating computer graphics, and their highly parallel structure makes them more effective than general-purpose CPUs for algorithms where processing of large blocks of data is done in parallel.
Virtualization provides the capability for multiple operating systems to simultaneously share processor resources in a secure and efficient manner. When implementing virtualization, it is necessary to translate addresses between a guest physical address of a virtualized guest machine (e.g., a virtual machine or a “VM”) into the corresponding machine physical address of the underlying physical hardware upon which the resources for the guest machine are virtualized.
For example, when an operating system (OS) is running inside a virtual machine, the operating system does not usually know the corresponding machine physical addresses of memory that it accesses. Direct access to the computer hardware is therefore complicated because if the guest operating system attempts to instruct the underlying hardware to perform a direct memory access (DMA) using the virtual machine's guest-physical addresses the instruction would likely corrupt the memory as the underlying hardware is unaware of the mapping or required translation between the guest physical address and the machine physical address for the virtual machine. A hypervisor managing the virtual machine can prevent such corruption, but the problem of address translation nevertheless remains.
An input/output memory management unit (IOMMU) can solve the problem of translation by re-mapping the addresses accessed by the underlying hardware according to a translation table that is used to map guest physical addresses to machine physical addresses. IOMMU technology such as VT-d or “Virtualization Technology for Directed I/O” can be leveraged to provide the necessary translation capability on behalf of the virtual machine and the hypervisor when the requisite circuitry and chipset is available. VT-d is a type of an IOMMU may be included with some chipsets to accompany a CPU.
Unfortunately, not all chipsets include the IOMMU or VT-d technology. For example, some Atom based platforms, tablets, handheld smartphones, and notebook computers lack the necessary circuitry to provide a conventional VT-d capability.
Device drivers within virtual machines do not function properly without DMA address translation. Software solutions to perform address translation for DMA operations have been attempted, for example, implemented within a hypervisor. However, performance of software based address translation is very poor. For example, 3D performance has been measured to be approximately 40% of a native VT-d type solution. Worse yet, software based solutions were measured to contribute about 90% of the total overhead when software within a hypervisor was utilized to perform the address translation.
Such an inefficient use of resources is unacceptable with today's mobile computing devices which strive for energy efficiency over pure computational processing horsepower. A more efficient solution is therefore necessary.
The present state of the art may therefore benefit from systems and methods for implementing GPU (Graphics Processing Unit) accelerated address translation for graphics virtualization as described herein.